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lnb parabola coaxial cable satellite receiver to tv set 1. abstract lnbp is the integrated solution for supplying/interfacing satellite lnb modules. it gives good performances in a simple and economical way, with a minimum use of external components. it is comprised of functions that realize lnb supplying/interfacing in accordance to the international standards. 2. introduction. figure 1: basic satellite installation a typical satellite receiver system is formed by these blocks (reported in figure 1): 1. the parabola is the antenna of the system and focuses the satellite signal to the lnb; 2. the lnb (low noise block) is placed on the focus of the parabola and converts the incoming signal in the 10ghz range to a lower frequency signal (in the 1-2ghz range) called ofirst conversion signalo. this allows the signal to be carried by an inexpensive coaxial cable towards the receiver. additionally, it improves the first conversion signal level by a built-in low noise amplifier. a universal lnb can change the type of polarization (horizontal or vertical) or operative band by command signals sent by the receiver; 3. the coaxial cable joins the lnb to the receiver and carries out 3 functions: a) to transfer the first conversion signal from the lnb to the receiver; b) to transfer the command signals from the receiver to the lnb to change polarization or signal band; c) to carry the dc voltage to supply the lnb. 4. the receiver converts the first conversion signal into control signals for the tv system. the receiver provides for that provides for two important features: july 2000 1/17 AN1230 application note lnb supply and control voltage regulator (parallel interface) f. lentini - g. benenati
AN1230 - application note 2/17 a) to supply the lnb block; b) to generate all the signals/voltages that lnb needs to operate correctly. 5. the supply/interface block is placed inside the receiver. it must perform the following functions: a) be ready to accept future digital standards with an external modulation input and fast oscillator start-up; b) implement the loop-through function in slave condition for single dish, multiple receiver system; c) accept the paralleling of 2 or more receivers and, in this condition. avoid the flow of reverse current from the output to the gnd; d) give accurate, thermal compensated outputs with the possibility to compensate the dc voltage drop caused by long coaxial cables; e) be reliable; f) provide overload (better if dynamic) and thermal protection with diagnostic; g) avoid every type of trimming; h) provide the possibility to be driven by a microcontroller or a simple digital logic to implement all these functions; i) finally, it must be cheap and get a small area in the board. all these functions are hard to be implemented with discrete components, but are greatly made easier by using an integrated device, like lnbp, that has been specially designed for this purpose. 3. functional blocks. lnbp comprises the following operative blocks (see figure 2): figure 2: internal block diagram prereg. output volt s electio n line lenght compensati on current limit vcc2 en vsel llc cext reference err.amp . oscillat or 22khz ent curr.amp . output port s electio n osel lnba lnbb mi vcc1 thermal prot . olf extm
AN1230 - application note 3/17 1. the oscillator is activated by putting the ent pin (enable tone) = h and is factory trimmed at 22khz 2khz, avoiding the need to use external trimming. the rise and fall edges are controlled to be in the 5 to 15 m s range, 10 m s typ., to avoid rf pollution towards the receiver. the duty cycle is 50% typ. it modulates the dc output with a 0.3v amplitude and 0v average. the presence of this signal usually gives the lnb information about the band to be received. 2. the osel (output port selection) selects the two outputs of the lnb (lnba and lnbb), in order to drive a dual-dish system, depending on its present state. when osel is l, the lnba port is selected. when osel is h, the lnbb port is selected. the lnba and lnbb outputs supply either 13v or 18v. if vsel is low (vsel = l) 13v is selected, otherwise, if vsel is high (vsel = h) 18v is selected. this kind of feature changes the lnbp polarization type. the lnb switches horizontal or vertical polarization depending on the supply voltage it gets from the receiver. 3. in order to keep the power dissipation of the device low, the input selector automatically selects vcc1, that is the lowest input voltage, when 13 v out is selected (i.e. vsel is l). if 18v out is selected (i.e. vsel is h), vcc2 input is selected. so power dissipation at iout=500ma is: pd=(22-18)*0.5=2w (with vcc2=22v and vout=18v) or (15-13)*0.5=1w (with vcc1=15v and vout=13v). without input selection we should have pd=(22-13)*0.5=4.5w, which is much higher. moreover, an internal switch selects the mi (master input) to be transferred to the lnba when the en pin is low. this case occurs when two receivers are connected in series and the slave receiver (the nearest to the antenna) is disabled. the master receiver supplies the lnb by means of the mi input of the slave receiver. 4. the line length compensation function is useful when the antenna is connected to the receiver by a long coaxial cable that adds a considerable dc voltage drop. when the lcc pin is h, the output voltage selected is increased by about 1v. 5. the reference drives all the internal blocks that require a high precision thermal compensated voltage source. 6. the lnbp has two different protection features, and both turn off the outputs. the first one acts in overload conditions (i.e. for output current 500ma), and the second for overheating (i.e. for tamb 150 c). a) the overload protection case occurs when output current request is 500ma. in this condition the device limits the output current at 500ma for a time ton depending on the cext value. when ton has elapsed, output goes low for a time of toff=15*ton. this keeps the power dissipated by the device low in overload conditions, and avoids to oversize the heatsink in such a condition. b) in the thermal protection case the output is disabled until the chip temperature has fallen. after that the lnbp restarts working properly. the lnba bypass switch is not protected, so the mi input must be driven by a current limited voltage source. figure 3: lnbp pin grouping lnbp20cr mi vcc2 vcc1 lnba lnbb en (active h) llc (active h) ent (active h) osel (l=lnba, h=lnbb) vsel (l=13v, h=18v) extm cext olf inputs outputs control signal
AN1230 - application note 4/17 0 5 10 15 20 25 0 1,000 2,000 3,000 4,000 5,000 capacitor cext( m f) toff (ms) to ff time vs. cext 0 5 10 15 20 25 0 50 100 150 200 250 300 capacitor cext ( m f) ton (ms) ton time vs. cext in figure 3 the lnbp pins are grouped by functions. the 5 control signals are logic inputs that control the ic function, and it is recommended that the vih not exceed 7v. cext controls the restore timing of the overload protection. if an overload protection is present, output goes low for a time imposed by the cext value. at the same time the olf pin, an open collector output, goes low. in figure 4 and figure 5 the behavior of ton and toff times vs. cext is respectively shown. when toff has elapsed, the output returns active for a time ton=toff/15. then, olf returns a high impedance output. if the overload is still present the cycle is repeated. this behavior greatly reduces the dissipation in the device. in fact, in short circuit conditions with vcc2=25 v, considering iout internally limited at 650ma and toff=15*ton we obtain: pd average=vin*iout*ton/(ton+toff)=25*0.65*1/(1+15)=1.02w, that is lower than the power dissipated in normal conditions. figure 4: overload protection on time versus c ext figure 5: overload protection off time versus c ext the cext must be properly chosen. it is related to the iout and cout (total capacitor connected to the lnba or lnbb output) values. large cout values at start-up give high current peak for a long time, and consequently, an overload condition for a time that could be greater than the ton imposed by cext. so the output will be forced low, completely discharge and will not start. for proper use it is necessary that
AN1230 - application note 5/17 external modulation input vin cin = 10 m f extm lnbp lnba or lnbb vout external modulation input v1 r2 cin = 10 m f extm lnba or lnbb vout lnbp r1 vin cout/cext 20. the olf also gives information about the thermal protection status. if the thermal protection is triggered, the output is disabled and the olf goes low. when the chip temperature has fallen, the output returns active and the olf returns to its 3-state condition. by sensing the on/off ratio of the olf signal, a microcontroller can discriminate if an overload or a thermal protection is present. extm modulates the vout by a capacitor connected in series (see figure 6). in this case: vout a.c.=vin a.c.*vout d.c./3 where, respectively, vout a.c. and vin a.c. are alternate components of vout and vin, and vout d.c. is the direct component of vout. for example, if an a.c. signal of 600mv p.p. must be imposed to the 13v d.c. out, the formula is as follows: vin a.c.= 3*vout a.c./vout d.c.=3*600/13 ? 140 mv p.p. if we dispose a 0-5v square wave signal to modulate output voltage, it is necessary to lower this signal amplitude. in accordance to figure 7 we have: r1=r2*(v1/vin-1). figure 6: how to use extm input figure 7: how to adjust the external modulation level r2 must be in the 50ohm range to minimize the effects of the extm input resistance variations. in our example we obtain: r1=50*(5/0.14-1)=1.7kohm. as a side effect, the extm modifies the vout by a resistor connected between this input and the gnd. figure 8 and 9 report the vout value vs. r.
AN1230 - application note 6/17 g s d sw1 tr1 tr2 tr3 tr4 tr5 lnba lnbb mi vcc2 vcc1 13v or 18v 13v or 18v 22v to 25v 15v to 25v 10k 4.7k 2.2k 1k 1.5k 680 470 330 220 150 100 47 0 17.50 20.50 output voltage (v) ta=+25 c 18.00 18.50 19.00 19.50 20.00 vcc1= vcc2 = 24v resistance (ohm) vout value vs. resistance 10k 4.7k 2.2k 1k 1.5k 680 470 330 220 150 100 47 0 12.00 15.00 voutvalue vs. resistance output voltage (v) ta=+25 c 12.50 13.00 13.50 14.00 14.50 vcc1= vcc2 = 24v resistance (ohm) figure 8: vout value vs. resistance on the extm pin at vsel = l figure 9: vout value vs. resistance on the extm pin at vsel = h figure 10: lnbp output stages
AN1230 - application note 7/17 0 100 200 300 400 500 600 700 2 2.5 3 3.5 4 4.5 5 5.5 6 iout (ma) vgs (v) vcc2-vmi = 5v vcc2-vmi = 4v vcc2-vmi = 3v vcc2- vmi = 1 2v vgs vs. iout fig ure10 4. operating mode. lnbp has 3 power inputs (vcc1, vcc2 and mi) and two outputs (lnba, lnbb) internally connected in accordance to the scheme reported in figure 10. by analyzing this scheme we can make out the following results: 1. tr1 is an n-channel power mosfet with its source connected to the lnba. it is driven by sw1, that joins the gate to vcc2. the drop between mi and lnba is due to the ron of tr1, but in some conditions it is increased by inadequate driving. in fact we have: vdrop=vdrain-vsource=vmi-(vcc2-vgs)=vgs-(vcc2-vmi). we can see that the drop can be minimized increasing the (vcc2-vmi) value. for example, if vcc2 increases, the effect of inadequate driving is cancelled. vgs depends on the tr1 and iout characteristics. figure 11 gives the vgs vs. iout plot, with vcc2-vmi as the parameter. therefore, given iout,vcc2 and vmi we can calculate the vdrop. if vcc2=22v, mi=21v and iout=500ma the formula is as follows: vdrop=vgs-1v. in figure 11 it results that vgs=3.1v at iload=500ma and vcc2-vmi=1v and in such conditions vdrop=3.1v-1v=2.1v. if we increase vcc2 at 26v we obtain: vdrop=5.65v-5v=0.65v, which is much lower. figure 11: loop-through switch gate voltage 2. in some cases it happens that two or more receivers share the same coaxial cable making their output hard paralleled, so the same voltage is present at the outputs of the receivers. if a receiver is not disconnected at the mains, it will flow a current from the lnba to the mi by means of the parasitic d-s tr1 diode. moreover, the tr2 (or tr4) b vb-e could be exceeded, so a reverse current could flow from the lnba to vcc2 (or vcc1) or from the lnbb to vcc2 (or vcc1), with possible destruction of the relative transistor. to overcome this drawback it is enough to add one or two diodes, depending on how many outputs are used, in series at the lnba or lnbb pins (see figure 12). in this case we have to consider the voltage drop across the diode that is load and temperature dependent. these effects can be minimized by using schottky diodes and activating the llc function. in alternative we can add one, two or three diodes - it depends if one, two or three inputs are used - in series at input oins m1, vcc1 and vcc2 (see figure 13). in this case diodes do not causea change at vout, but only a worsening of voltage drop, that can be minimized by using shottky diodes. diodes used in figures 12 and 13 must withstand a continuous current of almost 1a and a breakdown voltage of 30v (suggested type is byv10-30).
AN1230 - application note 8/17 lnbp mi vcc2 vcc1 lnba lnbb lnba' lnbb' lnbp mi vcc2 vcc1 lnba lnbb mi' vcc2' vcc1' figure 12: reverse current protection using diodes on the outputs figure 13: reverse current protection using diodes on the inputs 3. in alternative we can add one, two or three diodes, depending on how many inputs are used, in series at the mi, vcc1 and vcc2 input pins (see figure 13). in this case diodes do not cause a change at vout, but only worsen the voltage drop, which can be minimized by using schottky diodes. diodes used in figures 12 and 13 must withstand a continuos current of almost 1a and a breakdown voltage of 30v (suggested type is byv10-30). 5. application hints. 1. lnbp has an llc pin to compensate the voltage drop across the cable. this pin adds a discrete 1v value at the selected output voltage when it is active. it is also possible to obtain a continuous variation of the lnba or lnbb voltage by using extm input. 2. if only a single 22v source is suitable, at the cost of higher power losses in the device and higher heatsink surface, it is possible to power the vcc1 and vcc2 pins by the same 22v source without affecting any other circuit performance. in order to reduce power dissipation in the device, it can be useful to insert an adequate resistor in series to the vcc1 pin (see figure14). this resistor must be dimensioned considering that the minimum voltage on the vcc1 pin must be 16 v, with a supply current i supply = 500 ma. this means: r (22-16) / 500 *10 -3 @ 12 ohm. power dissipated in this resistor is: pd = r*iout 2 = 12* (500*10 -3) 2 =3w. it is recommended to bypass the vcc1 and vcc2 pins by 2.2 m f electrolytic capacitors. 3w is the power dissipated saved by the device. 3. if vcc2 is not inserted (i.e. the receiver is not connected to the mains) the tr1 can not bypass mi to the lnba, because the gate is not driven (see figure 10). it is possible to overcome this drawback by using the scheme reported in figure 15.
AN1230 - application note 9/17 vcc1 vcc2 mi lnbp lnba lnbb vin vcc1 vcc2 mi lnbp mc34063 + + +vin r1 0r15 0.5w r2 100r 1w r3 47k r4 2.7k r5 1.2k c1 100uf c2 1nf 7 6 4 2 8 1 5 3 150uh byv10-40 c3 330uf 1n4007 c5 10nf byv10-40 vcc1 vcc2 mi en vsel vsel en mi lnba hc03 hc03 hc03 +5v r6 10k r7 10k 12v lnbp lnba c4 .22uf c6 4.7uf + cext 13/18 v a figure 14: how to get vcc1 using a drop resistor figure 15: a loop-through switch that works without vcc2 6. single supply application. in some applications (tv receivers, pc cards, etc.) a 12v power supply is available. it is possible to use this voltage to supply the lnbp. figure 16 reports the schematic of the application proposed. it uses an mc34063 to step-up the 12v input at a value of 16v or 23v, depending on the vsel status. if vsel is h (i.e. the lnbp gives 18v at out lnba), a 23v voltage is available at point a. if vsel is l (i.e. the lnbp gives 13v at out lnba), a 16v voltage is available at point a. this keeps the power dissipated by lnbp low and gives good efficiency because the lnbp is supplied with a minimum drop. diode d2 protects the lnbp by reverse current. if the lnbp is disabled (i.e. en is l), the 23v voltage is selected at point a, regardless of the vsel status. the changing voltage at point a is actuated by hc03, which is an open-drain quad 2-input nand gate. figure 16: single supply application using mc34063a plus lnbpxx
AN1230 - application note 10/17 lnbp out r1 15 w bus lnba or lnbb l1 270 m h diseqc in ent 45 42 39 36 33 30 27 48 7. diseqc* specification. figure 17: impedance matching for diseqc the diseqc standard was born to implement the most complex system required, for example, by multiple-satellite installations, where multiple lnb placed in the parabola must communicate with the receiver in a two-way mode. this standard is compatible with 13/18v and 22khz tone and is easily implemented by a microcontroller. it requires hardware specifications that are faithfully satisfied by lnbp. in particular, the bus impedance can be matched using the scheme reported in figure 17. 8. thermal management. figure 18: thermal resistance versus on-board copper heatsink area lnbp has a built-in dynamic protection system that considerably lowers the power dissipation in short or overload conditions. therefore, the operative condition is the worst condition for power dissipation. lnbp is available in 3 packages: powerso-10, powerso-20 and multiwatt15. the last package can be assembled on a heatsink with: rth heatsink ( tj-tamb)/pd -r thjc -r thcs, where: tj=junction temperature (can be fixed at 150 c max); pd=dissipated power= s (vin-vout)*iout; r thjc = junction-case thermal resistance ~2 c/w;
AN1230 - application note 11/17 r thcs =case-heatsink thermal resistance ~1 1.5 c/w. for smd packages we must obtain the right r thtot. this can be achieved soldering the metallic case of the package on an adequate copper surface that acts like a heatsink. in the figure 18 the typical r thtot = r th heatsink + r thjc + r thcs vs. copper surface is shown, for a board with 1 or 2 layers. in the 2 layers case, a convenient number of ways (~9/cmsq) must be provided. for best results these ways must be inserted below the device and near it. doubling the surface we obtain a 3 c/w of r reduction. figure 19: electrical schematic board of powerso-20 ? figure 20: electrical schematic demoboard of multiwatt15 ? + + + + in mi d1 byv10-40 vcc1 vcc2 extm +5v r3 470ohm 1 2 3 4 5 1101120 6 7 16 13 15 5 c8 10 m f c3 2.2 m f c5 220nf d3 byv10-40 c2 2.2 m f c4 220nf d2 byv10-40 dl3 red olf 17 c7 4.7 m f c6 10nf r2 2.2k dl2 green 14 19 tpb out lnbb c1 10nf r1 2.2k dl1 green out lnba tpa 4 18 2 3 lnbp20pd vcc1 mi lnba vcc2 extm lnbb ent llc osel en vsel cext gnd olf + + + in mi d1 byv10-40 vcc1 vcc2 extm r3 470ohm 1 2 3 4 12 4 9 7 5 11 5 c6 10 m f c3 2.2 m f d1 byv10-40 c2 2.2 m f c4 220nf d2 byv10-40 dl3 red overload 13 c8 10nf r2 2.2k dl2 green 8 15 tip probe out out lnbb c5 10nf r1 2.2k dl1 green out lnba-f tip probe out 3 18 1 2 lnbp20cr vcc1 mi lnba vcc2 extm lnbb ent llc osel ent vsel cext olf bnc +5v + gnd c7 4.7 m f 10 gnd-s gnd-f out lnbb-s out lnba-s
AN1230 - application note 12/17 figure 21: powerso-20 demoboard figure 22: multiwatt15 demoboard
AN1230 - application note 13/17 ja jb ant connectors 17v 24v mcu+v vcc1 1 vcc2 2 lnba 3 lnbb 15 gnd 8 llc 12 extm 11 osel 7 en 5 ent 9 vsel 4 olf 13 mi 14 cext 10 lnbp20cr c2 10uf r1 47k aux data c3 2x 0.1 m f c1 4.7 m f c4 c6 c5 2x 47nf tuner i/os mcu i/os vcc + regulator(double dish) lnb supply and control voltage + the two demoboards of the lnbp of the powerso-20 and multiwatt packages are shown below. the different layer drawings are shown in figure 19 and 20. the first one is based on the powerso-20 pack- age and the second on the multiwatt packages. 10. schematic circuit description. 10.1 power so-20 ? package. two comb connectors (8 pins each) are used for the input and output voltage and for all control signals (vsel, en, osel, llc, ent). it is possible to force at high levels all the control signals through a 5 pin dip-switch. if the control signals come from outside the board, the dip-switches must be in the off position. an oscilloscope probe can be connected to the tpa and tpb test points to monitor the 22khz signal. 10.2 multiwatt ? package. the multiwatt electric schematics is shown in figure 20. in the board some plugs are provided for the input of the following signals: vcc1,vcc2, mi, +5v and gnd (force and sense). also, lnba and lnbb (force and sense) are connected by plugs. the load is connected between the output connector lnba-f (or lnbb-f) and gnd-f. between the lnba-s (or lnbb-s) and gnd-s two voltmeters can be connected to monitor the output voltage. besides, two plugs connected with the two outputs permit the insertion of the oscilloscope probes to monitor the 22khz tone. the extm input can be connected to the relative bnc connector. it is, moreover, possible to force at high level the following inputs: en, osel, ent, vsel , and llc by five switches. it is moreover possible to force such inputs even through the five poles connector. in this case all the switches must be in off position. 11. conclusion this paper gives practical information to develop numerous applications using this solution for supplying satellite lnb. the use of the existing lnbp demoboard allows the development of the final product. on the next pages there are numerous examples of typical application schematics based on lnbp. typical application schematics are shown below. figure 23: two antenna ports receiver
AN1230 - application note 14/17 regulator (double lnb) lnb supply and control voltage vcc1 1 vcc2 2 lnba 3 lnbb 15 gnd 8 llc 12 extm 11 osel 7 en 5 ent 9 vsel 4 olf 13 mi 14 cext 10 lnbp20cr c2 10uf mcu+v r1 47k aux data str 1 d 2 clk 3 oe 15 q1 4 q2 5 q3 6 q4 7 q5 14 q6 13 q7 12 q8 11 qs 9 qs 10 4094 tuner ja jb ant connectors c4 c6 c5 2x 47nf c3 2x 0.1 m f c1 4.7 m f mcu+v serial bus mcu i/os vcc + 17v 24v regulator (single lnb) lnb supply and control voltage mcu+v vcc1 1 vcc2 2 lnba 3 lnbb 15 gnd 8 llc 12 extm 11 osel 7 en 5 ent 9 vsel 4 olf 13 mi 14 cext 10 lnbp20cr c2 10uf aux data r1 47k ant master c4 c5 47nf c3 2x 0.1 m f c1 4.7 m f i/os vcc mcu i/os + tuner 17v 24v + figure 24: single antenna receiver with master receiver port figure 25: using serial bus to save mpu i/os
AN1230 - application note 15/17 regulator (double lnb) lnb supply and control voltage ja jb ant connectors vcc1 1 vcc2 2 lnba 3 lnbb 10 gnd 6 cext 8 osel 9 en 5 ent 7 vsel 4 lnbp10sp c1 4.7 m f c6 c5 2x 47nf c4 0.1 m f tuner i/os mcu mcu+v i/os vcc + 24v regulator (double lnb) lnb supply and control voltage low cost solution using powerso-10 ja jb ant connectors vcc1 1 vcc2 2 lnba 3 lnbb 10 gnd 6 cext 8 osel 9 en 5 ent 7 vsel 4 lnbp10sp c3 2x 0.1 m f c1 4.7 m f c4 c6 c5 2x 47nf tuner i/os mcu mcu+v i/os vcc + 17v 24v typical schematics cont'd figure 26: two antenna ports receiver figure 27: connecting together vcc1 and vcc2
AN1230 - application note 16/17 regulator (single lnb) lnb supply and control voltage low cost solution using powerso-10 vcc1 1 vcc2 2 lnba 3 mi 10 gnd 6 cext 8 extm 9 en 5 ent 7 vsel 4 lnbp13sp c2 10 m f aux data tuner ant master c4 c5 47nf c3 2x 0.1 m f c1 4.7 m f mcu+v i/os vcc mcu i/os + 17v 24v + regulator (single lnb) lnb supply and control voltage low cost solution using powerso-10 mcu+v c2 10 m f vcc1 1 vcc2 2 lnba 3 gnd 6 cext 8 extm 9 en 5 ent 7 vsel 4 olf 10 lnbp15sp aux data r1 47k tuner ant c4 c5 47nf c3 2x 0.1 m f c1 4.7 m f vcc i/os mcu i/os + 17v 24v + figure 28: single antenna receiver with master port figure 29: single antenna receiver overload diagnostic
AN1230 - application note 17/17 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 2000 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www .st.com

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